The FPGA Chronicles: Exploring The Tang Nano 20K

FPGAs was mysterious, costly gadgets, however today you should purchase surprisingly succesful boards for little or no cash. Some years in the past, I did an FPGA Bootcamp over on Hackaday.io. Much of that materials nonetheless applies, however the {hardware} is dated. So I made a decision it was time to replace it, utilizing the cheap Tang Nano 20K and its GOWIN GW2AR-18 FPGA as the primary platform, with maybe just a few excursions into different FPGAs.

History and Motivation

Once upon a time, when you wished to have a customized IC, you went with a wheelbarrow full of cash to a semiconductor firm. However, some good particular person at a semiconductor fab finally realized they may make a chip with plenty of uncommitted blocks on it after which, for a customized chip, solely design the wiring that linked them collectively. This nonetheless required a wheelbarrow full of cash, however it was a smaller wheelbarrow.

Then in the future, somebody realized they may do the identical factor however make {the electrical} connections between the blocks configurable. Maybe have fuses you’ll be able to blow, or use EEPROM or RAM cells to recollect which blocks are linked to which. It is difficult, positive, however then you can also make many of those chips and promote them to individuals who might, in principle, make their very own customized chips with out your assist.

When do you want an FPGA? A traditional classroom train for an FPGA, for instance, is a site visitors mild as a result of it reveals off tips on how to do state machines, that are essential for some sorts of FPGA designs. But aside from as a studying instance, why would you do that? Even a easy 8-bit CPU can deal with a site visitors mild.

Suppose as a substitute that you’ve got a whole bunch of digital sensors on a rocket, and any considered one of them should elevate an alarm inside just a few microseconds. A processor has to pattern inputs in teams, service interrupts, or depend on further {hardware}. An FPGA can merely implement the equal of 1 huge OR gate. It watches each enter repeatedly, and unrelated logic elsewhere within the FPGA doesn’t steal execution time from it. Can you do it with a microcontroller? Probably, however not simply. For some courses of issues, an FPGA is the higher reply.

Of course, you too can construct a CPU in your FPGA and a few FPGAs have CPUs in the identical package deal. This is commonly a candy spot as a result of then issues which can be straightforward to do in software program, you do in software program. Things which can be simpler to do in {hardware}, you do within the FPGA.

The 20K Solution

How large of an FPGA do you want? It is tough to check FPGAs as a result of the blocks are totally different. Think of PC reminiscence. You can discuss 1 GB vs 4 GB, however the full image relies on the reminiscence velocity, bandwidth, and timing. FPGAs are the identical approach. Two FPGAs might have an identical variety of constructing blocks, however one might have rather more highly effective constructing blocks than the opposite. However, the 20K board’s FPGA is sort of succesful, even whether it is onerous to check it on to different FPGAs from different distributors.

It makes use of GOWIN’s GW2AR-LV18QN88C8/I7, which incorporates 20,736 four-input look-up tables (LUT4s) and 15,552 flip-flops. The actual most clock charge relies upon closely on the logic and routing, so there is no such thing as a single helpful “FPGA clock velocity,” however the machine is sort of snug within the low a whole bunch of MHz for appropriately pipelined designs.

Where the chip shines is reminiscence. Most FPGAs have distributed RAM, which eats up assets on the chip, and block RAM, that are devoted RAM cells. The GOWIN has each of those choices. It additionally has a separate 8 Mbyte, 32-bit SDR SDRAM proper within the package deal. Of course, it’s a must to eat up some FPGA assets to speak to it, however not as a lot as you may assume, and positively not as a lot as it could take to position an 8 Mbyte RAM within the FPGA material.

There are different special-purpose blocks, like 48 18×18 multipliers, you’ll be able to configure in just a few methods. The Nano 20K board additionally has a programmable clock generator, QSPI flash (64 Mbits), and connections for audio, LCD, microSD, and HDMI. A microcontroller permits you to program the clock generator, flash the chip by way of JTAG, or present a digital serial port again to the host.

Simply FPGA

The primary workflow for an FPGA is:

1. Define the logic you need utilizing an HDL (we’ll use Verilog, however VHDL can also be widespread).

2. Define a “high block” that connects to the surface globe.

3. Set up constraints that primarily inform the machine which pins hook up with which ports on the highest block.

4. Run a synthesis course of that converts your HDL to primitives.

5. Run a spot and route course of that assigns primitives to particular chip assets and produces a “bitstream.”

6. Download the ensuing bitstream to the FPGA’s RAM or to the configuration flash (which makes it survive an influence cycle).

You can do all of this stuff with GOWIN’s IDE or open-source instruments that we’ll discuss later.

Inside

You may assume you simply need to draw schematics. Some FPGA instruments enable that, however the GOWIN IDE doesn’t. It can, nonetheless, draw schematics to indicate you what you requested for. Turns out, in case you are doing one thing giant, schematics are a ache. Why draw out a 7-segment decoder when you’ll be able to simply describe it utilizing a software-like language?

Inside the chip, there aren’t actually uncommitted gates per se. There are lookup tables. So when you specify that Z=A|(BC)|(A^D) it doesn’t actually go discover an AND gate, an OR gate and an XOR gate. It simply develops a desk and packages that desk to supply that operate. That’s why LUTs — Look Up Tables — are essential.

Simplicity

So let’s have a look at the only potential factor you may do.

module high(output led1, output led, enter sw0, enter sw1);
assign led=~(sw0|sw1);
assign led1=~(sw0&sw1);
endmodule

We’ll speak extra about Verilog later, however for now be aware that nothing “executes” these strains one by one. This actually tells the FPGA design software program to attach the 2 switches to a logic gate after which invert the outcome and join it to the LED. At run time, this isn’t code, it’s wiring.

The LEDs on the board are lively low, so this simply takes two inputs (presumably switches), computes the OR and AND, and outputs them to the LEDs. The switches on the 20K are pulled down so there’s no want for a pull up or pull down within the FPGA. The output is a logic one while you press the swtich.

How do you join the gadgets to your “code?” You want a constraint file, and that’s best executed by means of the “Floorplan” editor (see the determine). It builds a file which you’ll be able to change when you choose to work with a file:

IO_LOC "led" 15;
IO_PORT "led" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
IO_LOC "led1" 16;
IO_PORT "led1" IO_TYPE=LVCMOS33 PULL_MODE=UP DRIVE=8 BANK_VCCIO=3.3;
IO_LOC "sw1" 88;
IO_PORT "sw1" IO_TYPE=LVCMOS33 PULL_MODE=NONE BANK_VCCIO=3.3;
IO_LOC "sw0" 87;
IO_PORT "sw0" IO_TYPE=LVCMOS33 PULL_MODE=NONE BANK_VCCIO=3.3;

That’s it. The schematics are available in two flavors. One reveals what you’d anticipate (see the determine). The different reveals opaque LUT bins.

The video beneath walks by means of the design from beginning the undertaking to watching it work on a breadboard.

Installing

I’m glossing over plenty of particulars. While the GOWIN software program runs on Linux, I needed to do rather a lot to get it to work. Since I wasn’t on a supported distro, I needed to work out the dependencies myself, however that wasn’t too onerous.

The downside was once I tried to execute this system. The first downside was with libfreetype.so.6. I eliminated the personal copy and linked it to my system copy. That acquired me a little bit additional. However, to get all of it working, I wanted to set (or add) GOWIN’s lib listing to LD_LIBRARY_PATH to stop it from selecting up system libraries.

The programmer additionally wanted a little bit work to not run afoul of different drivers on the system. The particular treatment there for me was to construct the file: /and many others/udev/guidelines.d/99-tang-nano-20k.guidelines with these strains:

SUBSYSTEM=="usb", DRIVER=="ftdi_sio", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", ATTR{bInterfaceNumber}=="00", RUN+="/bin/sh -c 'echo $kernel > /sys/bus/usb/drivers/ftdi_sio/unbind'"

Of course, my fixes might or might not assist your issues. If you might be fortunate, you gained’t want any fixes in any respect. The open-source instruments are maybe a little bit simpler to take care of, and we’ll have a look at these too. However, among the GOWIN instruments are good, and you’ll verify an choice to have it all the time use your selection of exterior editors, which is a pleasant characteristic.

Next Time

If you want a refresher on digital logic, the unique FPGA Bootcamp 0 permits you to find out about logic design utilizing a free instrument in your browser. No FPGA required in any respect. Meanwhile, we’ll be wanting later at open-source instruments, IP, synchronous logic, and utilizing the built-in logic analyzer, amongst different issues. If you need to discuss this sequence, drop by our Discord server.

When you end up your subsequent FPGA undertaking, don’t neglect to send us a tip. You may see your undertaking on Hackaday.